In-circuit testing of printed circuit assemblies (PCA) electrically verifies component presence, correctness, orientation, and liveness as well as tests for shorted or open component pins. In-circuit test platforms may be, however, frequency and technology limited. For example, current in-circuit test platforms may detect the presence of a high frequency, low voltage swing clock (e.g., positive emitter coupled logic (PECL), high-speed transceiver logic (HSTL), low voltage differential signaling (LVDS) signals) but may not verify frequency. “Voltage swing” refers to a difference between the high and the low voltage of an input or output signal of a component. Additionally, current platforms may not be capable of supplying a high frequency, low voltage swing clock to test components of a PCA, such as phase-locked loops, under anticipated operating conditions.
While some in-circuit test platforms divide a high frequency clock so that it is within a range of the platform, the platform may be incapable of translating a signal to amplify, for example, a low voltage swing signal for reliable interpretation. Thus, in-circuit test platforms may be incapable of accurately evaluating a PECL, HSTL, or LVDS signal and also may be incapable of translating such signals to, for example, TTL for evaluation. Current tests may additionally be limited because testing logic (e.g., a divide circuit or a clock circuit) may prevent an in-circuit test platform from sending drive signals directly to a PCA to test components in the PCA. This prevents the in-circuit test platform from testing for solder shorts on clock nets before power is applied to the PCA as well as testing pins of other components connected to the clock nets using the same probes for receiving the clock.
In sum, in-circuit test platforms and and-on hardware such as the frequency isolator/divider boards by TestNet Inc., of Algonquin, Ill. may be unreliable when testing components such as oscillators, phase-locked loops, and other clock generators that supply high speed, low voltage swing signals (e.g., PECL, HSTL, LVDS signals). Therefore, a printed circuit assembly (PCA) may have functional or performance defects which are detected only after the PCA has reached downstream customers or users. The defects include frequency or amplitude defects and stuck-at faults. Overall, these clock defects are difficult to debug, divert time and energy away from design and verification, and create potential problems at the customer site.
Therefore, there is a need for efficiently detecting clock defects in printed circuit assemblies that include components that either generate high frequency, low voltage swing signals or operate using high frequency, low voltage swing signals.